Backside Power Delivery for Advanced Transistor Nodes: Fabrication and Process Integration
By Poonam Sonawane
The race to scale semiconductor technology into the single-digit nanometer era is driving radical innovations in chip architecture. Among them, Backside Power Delivery Networks (BSPDN) stand out as a game-changer allowing unprecedented power efficiency, lower IR drop, reduced noise coupling, and improved thermal management in logic devices.
This definitive volume delivers a complete, process-level blueprint for integrating backside power delivery into advanced transistor nodes, from 7nm FinFET to Gate-All-Around (GAA) and beyond. Written for engineers, researchers, and semiconductor professionals, it combines practical manufacturing detail with a clear explanation of the underlying physics, design considerations, and industry trends.
What you’ll learn inside:
Richly illustrated with process flow diagrams, SEM cross-sections, and real manufacturing data, this book bridges the gap between theoretical design and practical process execution. It’s not just about how to build a BSPDN it’s about how to make it work in volume production.
Whether you’re an R&D engineer pushing the limits of Moore’s Law, a process integration specialist, or an academic researcher preparing the next generation of semiconductor experts, this book will equip you with the knowledge, methods, and insights to master backside power delivery in the most advanced nodes.
Step into the future of chipmaking. Power your devices from the backside and power the industry forward.